Recent Memory Industry News
November 2007
Rambus Charts Map to Terabyte Throughput
DRAM market gears up for DDR3
Intels new 45nm controllers use 30% less power and are 20% faster using hafnium instead of silicon dioxide
Freescales new S08 Microcontroller
MicroTCA (MTCA) Conference November 20 in Munich Germany
October 2007
New PICMG COM Express™ Subcommittee
Intel pushing XMP in JEDEC
Rambus has a new DDR3 Memory Controller Interface
MicroTCA gets set to eclipse AdvancedTCA
Now the Standard: 1Gb DRAM
September 2007
AMD Unveils "Barcelona" Architecture
Intel launches Craneland and Tigerton
August 2007
Z-RAM Zero-Capacitor DRAM memory technology licensed to Hynix
Intel IDF conference on September 18-20, 2007 in San Francisco, California
AdvancedTCA Summit on October 18-19, 2007 in Santa Clara, California
Intel Readies Research Papers On Programmable Multicore Architectures
July 2007
Intel Backs Specification For Low-Cost Blade Servers
AMD Unveils DDR3 "Socket G3 Memory Extender" (G3MX) technology to increase system memory
Intel may stop pushing DDR3 FB-DIMM for server, say makers
NASA Selects SGI to Provide Largest Shared-Memory System in the World: (4TB =1000 4GB modules)
Samsung 50nm 1Gb DDR2 gains Intel validation
Altera Stratix III has First Full-Compliance With New JEDEC DDR3 SDRAM Standard
One chip does three memory jobs
Filling the holes on the highway to a healthy AdvancedTCA ecosystem
JEDEC DDR3 Workshop on October 3-4, 2007 in San Jose, California
MEMCON conference on July 18-19, 2007 in San Jose, California
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to help computer hardware board designers with DRAM memory subsystems.
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